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CircuitGear CGR-101 Internals

The  CircuitGear is a PC based oscilloscope and function generator and, well, I couldn't resist opening mine up. Inside is a high speed dual channel ADC, a high speed DAC, a FPGA to drive it all, an ATMEGA48 for unknown use, and a FTDI UART-to-USB chip for the host communication.

The board is covered with test points which probably include the JTAG ports for the FPGA memory and the programming port for the ATMEGA.

The interesting chips are:

FPGA Xilinx XC3S50-4VQG100C Spartan-3 FPGA (XC3S50 VQG100E is written on the part)  http://www.xilinx.com/support/#Spartan-3
FPGA code Xilinx XCF01S 1Mbit 'Platform Flash' Programmable by JTAG  http://www.xilinx.com/products/config_mem/pf.htm
Op-amp TI OPA4354A 250 MHz Quad Operational Amplifier  http://focus.ti.com/docs/prod/folders/print/opa4354.html
DAC TI DAC908 8-Bit, 165MSPS DAC  http://focus.ti.com/docs/prod/folders/print/dac908.html
ADC ADC10D020 Dual 10-Bit, 20MSPS, 150mW A/D Converter  http://www.national.com/pf/DC/ADC10D020.html
USB FTDI FT232RL USB UART IC - up to 3 Mbaud  http://www.ftdichip.com/Products/FT232R.htm
Microcontroller Atmel ATMEGA48-20AU Microcontroller with 4 k flash and 512 b RAM  http://www.atmel.com/dyn/products/product_card.asp?PN=ATmega48PA
I/O buffers 74LVT244A 3-state 3.3 V octal buffer/line drivers  http://www.nxp.com/pip/74LVT_LVTH244A_4.html
74HC4316M Quad analogue switch


The FPGA is driven by a 24 MHz crystal which is probably PLLed up in the chip. The ATMEGA is driven by a 18 MHz crystal. Apparently the UART runs at 230400 baud so it may not be hooked into the ATMEGA.

Using double speed mode on a 18 MHz clock the ATMEGA can acheive the following baud rates:

Divisor Rate Closest normal Error
1 2250000
2 1125000
3 750000
4 562500
5 450000 460800 +2 %
6 375000
7 321429
8 281250
9 250000 250000 +0 %
10 225000 230400 +2 %
11 204545

According to the FTDI datasheet:

Baud Rate = 3000000 / (n + x) where 'n' can be any integer between 2 and 16,384 ( = 2 ) and 'x' can be a sub-integer of the value 0, 0.125, 0.25, 0.375, 0.5, 0.625, 0.75, or 0.875. When n = 1, x = 0, i.e. baud rate divisors with values between 1 and 2 are not possible.

So the FTDI chip has a divide by eight fractional scaler. The rates that match up are:

Divisor Rate ATMEGA rate Error
2.000 1500000
2.125 1411765
2.250 1333333
2.375 1263158
2.500 1200000
2.625 1142857 1125000 +2 %
4.000 750000 750000 0 %
5.250 571429 562500 +2 %
5.375 558140 562500 -1 %

At 10 bits/sample and running the UART at 1125000 we can transfer 90,000 samples/s. Using  A-law or similar we might be able to do 112,500 samples/s. The current system doesn't pack the values so tops out at 11,520 samples/s.

Pictures

Click on the image for the full size version.

PCB top side

Analogue half

Right/digital half

Parts

Attachments